|
ð 0000:00:07.1:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:07.1:pcie010
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:08.1:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:00:08.1:pcie010
|
-- |
drwxr-xr-x |
|
|
ð 0000:40:01.1:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:40:01.1:pcie004
|
-- |
drwxr-xr-x |
|
|
ð 0000:40:01.1:pcie010
|
-- |
drwxr-xr-x |
|
|
ð 0000:40:01.2:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:40:01.2:pcie004
|
-- |
drwxr-xr-x |
|
|
ð 0000:40:01.2:pcie010
|
-- |
drwxr-xr-x |
|
|
ð 0000:40:07.1:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:40:07.1:pcie010
|
-- |
drwxr-xr-x |
|
|
ð 0000:40:08.1:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:40:08.1:pcie010
|
-- |
drwxr-xr-x |
|
|
ð 0000:40:08.2:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:40:08.2:pcie010
|
-- |
drwxr-xr-x |
|
|
ð 0000:40:08.3:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:40:08.3:pcie010
|
-- |
drwxr-xr-x |
|
|
ð 0000:80:03.1:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:80:03.1:pcie004
|
-- |
drwxr-xr-x |
|
|
ð 0000:80:03.1:pcie010
|
-- |
drwxr-xr-x |
|
|
ð 0000:80:03.2:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:80:03.2:pcie004
|
-- |
drwxr-xr-x |
|
|
ð 0000:80:03.2:pcie010
|
-- |
drwxr-xr-x |
|
|
ð 0000:80:07.1:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:80:07.1:pcie010
|
-- |
drwxr-xr-x |
|
|
ð 0000:80:08.1:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:80:08.1:pcie010
|
-- |
drwxr-xr-x |
|
|
ð 0000:c0:03.3:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:c0:03.3:pcie010
|
-- |
drwxr-xr-x |
|
|
ð 0000:c0:03.4:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:c0:03.4:pcie010
|
-- |
drwxr-xr-x |
|
|
ð 0000:c0:03.5:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:c0:03.5:pcie010
|
-- |
drwxr-xr-x |
|
|
ð 0000:c0:03.6:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:c0:03.6:pcie010
|
-- |
drwxr-xr-x |
|
|
ð 0000:c0:03.7:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:c0:03.7:pcie010
|
-- |
drwxr-xr-x |
|
|
ð 0000:c0:07.1:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:c0:07.1:pcie010
|
-- |
drwxr-xr-x |
|
|
ð 0000:c0:08.1:pcie001
|
-- |
drwxr-xr-x |
|
|
ð 0000:c0:08.1:pcie010
|
-- |
drwxr-xr-x |
|